发明名称 |
High impedance, high parallelism, high temperature memory test system architecture |
摘要 |
An electronic device for use with a probe head in automated test equipment. The device includes a plurality of semiconductor devices arranged to provide at least one driver/receiver pair where the driver portion of the driver/receiver pair is configured to transmit a signal to at least one device under test and the receiver portion of the driver/receiver pair is configured to receive a signal from the at least one device under test. Each of the plurality of semiconductor devices is fabricated using either a silicon-on-insulator (SOI) or metal-on-insulator (MOI) technology and has a thickness less than about 300 μm exclusive of any electrical interconnects. The at least one driver/receiver pair is adapted to mount directly to the probe head.
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申请公布号 |
US7768278(B2) |
申请公布日期 |
2010.08.03 |
申请号 |
US20070689585 |
申请日期 |
2007.03.22 |
申请人 |
VERIGY (SINGAPORE) PTE. LTD. |
发明人 |
MAYDER ROMI O. |
分类号 |
G01R31/02 |
主分类号 |
G01R31/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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