发明名称 Output gain stage for a power amplifier
摘要 In one embodiment, the present invention includes multiple gain stages to receive and amplify a differential input signal at different common mode voltages. The stages each may include a pair of linear NMOS gain transistors coupled to a primary coil of a given output transformer. One of the stages may include commonly coupled terminals coupled to a center tap of the primary coil of an output transformer of another stage, and a supply current provided to one of the stages is re-used for the other stage(s).
申请公布号 US7768350(B2) 申请公布日期 2010.08.03
申请号 US20080317819 申请日期 2008.12.30
申请人 JAVELIN SEMICONDUCTOR, INC. 发明人 SRINIVASAN VISHNU;BOCKELMAN DAVID E.
分类号 H03F3/45 主分类号 H03F3/45
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