发明名称 Partial-write-collector algorithm for multi level cell (MLC) flash
摘要 A flash memory system includes a multi level cell (MLC) flash memory organized into blocks and having pages of information, which has data and spare. The MLC flash memory includes at least a temporary area to store at least a portion of a page of information during a partial write operation. The MLC flash memory stores a page of information into a block identified by a target physical address. The flash memory system further includes a flash card micro-controller causes communication between a host flash card controller and the MLC flash memory and includes a buffer memory configured to store a portion of a page of information, where the micro-controller writes the at least a portion of a page of information to the temporary area and later copies the written at least a portion of a page of information into the block identified by a target physical address.
申请公布号 US7769944(B2) 申请公布日期 2010.08.03
申请号 US20070774906 申请日期 2007.07.09
申请人 SUPERTALENT ELECTRONICS, INC. 发明人 LUO JIANJUN;TSU CHRIS;LEE CHARLES CHUNG;CHOW DAVID QUEICHANG
分类号 G06F12/00 主分类号 G06F12/00
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