发明名称 SIMULATION DEVICE, SIMULATION METHOD, AND RECORDING MEDIUM RECORDED WITH PROGRAM FOR SIMULATION
摘要 <P>PROBLEM TO BE SOLVED: To calculate an electric characteristic of an electric field effect transistor in a short time. Ž<P>SOLUTION: This simulation device 1 includes a structure model setting part 11, a quantization state calculating part 12, and a state mixing part 13. The structure model setting part 11 sets a virtual structure model, assuming that hetero-structure of a FET has a confinement potential for forming a channel area and comprises a single semiconductor layer. The quantization state calculating part 12 calculates a virtual quantized electron state in each of the virtual structure models, as a virtual electron state. The state mixing part 13 mixes physical quantities of the virtual electron states, to calculate a physical quantity of a quantized electron state in the channel area. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010165924(A) 申请公布日期 2010.07.29
申请号 JP20090007832 申请日期 2009.01.16
申请人 RENESAS ELECTRONICS CORP 发明人 TAKEDA YUTAKA
分类号 H01L21/336;G06F17/50;H01L29/00;H01L29/78 主分类号 H01L21/336
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