发明名称 WINDOW COMPARATOR CIRCUIT FOR LIMITING INPUT VOLTAGE APPLIED TO OBJECT CIRCUIT
摘要 Plurality of current mirror circuits CM1 to CM5 at which the same amount of current I1 flows in the circuits. Transistors Qa4/Qb5 are ON state when it is in the steady state. Transistors Qa5/Qb7 turn ON and transistors Qb6/Qa6 turn OFF when a voltage generation circuit 3 applies a voltage more than predetermined value V12 to node N3. Therefore node N3 becomes fixed voltage V12. On the other hand, voltage generation circuit 3 applies a voltage less than predetermined value V23 to node N3, transistors Qb5/Qa6 turn ON, and transistors Qa5/Qb7 turn OFF. Accordingly, the node N3 becomes fixed voltage V23.
申请公布号 US2010188789(A1) 申请公布日期 2010.07.29
申请号 US20100692097 申请日期 2010.01.22
申请人 DENSO CORPORATION 发明人 SATAKE HIROYUKI;MIKI TAKESHI
分类号 H02H1/00;G05F3/02;H03L5/00 主分类号 H02H1/00
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