发明名称 |
Setting Controller Termination in a Memory Controller and Memory Device Interface in a Communication Bus |
摘要 |
A DRAM and memory controller are coupled during driver training to reduce mismatches. The impedances of the system are controlled through a termination at the controller to yield improvements in timing margins. The coupling of the components on a shared electrical bus through adjustment of the termination values during training removes known offset issues.
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申请公布号 |
US2010192000(A1) |
申请公布日期 |
2010.07.29 |
申请号 |
US20090361836 |
申请日期 |
2009.01.29 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
FOX BENJAMIN A.;HOVIS WILLIAM P.;LIANG THOMAS W.;RUDRUD PAUL |
分类号 |
G06F1/26;G06F11/30;G06F12/00;G06F13/14 |
主分类号 |
G06F1/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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