DIGITAL CLOCK DATA RECOVERY APPARATUS AND A TRANSCEIVER COMPRISING THE SAME

摘要

The present invention relates to a clock data recovery apparatus having all circuits thereof digital-circuitized through a digital filter and a digitally controlled oscillator (DCO). A DCO according to the present invention has a chain of plural inverters, and a variable resistance switch matrix is configured between the inverters and a voltage source for supplying a source current to each of the inverters to tune the oscillation frequency through variation of a supply voltage. Here, the variable resistance switch matrix is implemented by using a PMOS transistor array, and meanwhile a vertical resistance is further inserted between columns of the switch matrix to equalize between the frequency tuning step at a lower level and the frequency tuning step at a high level. Also, to resolve the occurrence of jitter problems, a primary sigma delta modulator is used for implementing a dithering circuit and a segment thermometer scheme is applied to tune a DCO with a smaller number of routing lines.