发明名称 Method for making an integrated circuit including vertical junction field effect transistors
摘要 A method for making an integrated circuit including vertical junction field effect transistors is disclosed. One embodiment creates a vertical junction field effect transistor using a fault-tolerant or alignment-tolerant production process. The device performance is not harmed, even if misalignments in consecutive semiconductor processing steps occur.
申请公布号 US7763506(B2) 申请公布日期 2010.07.27
申请号 US20070852853 申请日期 2007.09.10
申请人 INFINEON TECHNOLOGIES AUSTRIA AG 发明人 TREU MICHAEL;RUPP ROLAND;MITLEHNER HEINZ;ELPELT RUDOLF;FRIEDRICHS PETER;WEHRHAHN-KILIAN LARISSA
分类号 H01L21/337 主分类号 H01L21/337
代理机构 代理人
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