发明名称 |
Semiconductor memory device having a short reset time |
摘要 |
A semiconductor memory device includes a row path circuit, a reset signal generating circuit and a column path circuit. The row path circuit is initialized in response to a power-up signal. The reset signal generating circuit delays the power-up signal to generate a column reset signal. The column path circuit is initialized in response to the column reset signal. The semiconductor memory device can reduce a peak value of a surge current by initializing a row path circuit and a column path circuit at different time points. Therefore, the semiconductor memory device may have a relatively short setup time of an internal power supply voltage.
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申请公布号 |
US7764562(B2) |
申请公布日期 |
2010.07.27 |
申请号 |
US20080012244 |
申请日期 |
2008.02.01 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHEON KWUN-SOO;NA BYONG-WOOK |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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