发明名称 Dynamic random access memory structure having merged trench and stack capacitors
摘要 A dynamic random access memory structure includes a recessed-gate transistor disposed in the substrate; a trench capacitor structure disposed in the substrate and electrically connected to a first source/drain of the recessed-gate transistor; a first conductive structure disposed on and contacting the trench capacitor structure; a stack capacitor structure disposed on and contacting the first conductive structure, wherein a bottom electrode of the trench capacitor structure and a top electrode of the stack capacitor structure are electrically connected to serve as a common electrode; and a bit line disposed above a second source/drain of the recessed-gate transistor and electrically connected to the second source/drain, wherein the top of the bit line is lower than the top of the gate conductive layer of the recessed-gate transistor.
申请公布号 US7763924(B2) 申请公布日期 2010.07.27
申请号 US20080244747 申请日期 2008.10.02
申请人 NANYA TECHNOLOGY CORP. 发明人 HUANG WEN-KUEI
分类号 H01L27/108;H01L29/94 主分类号 H01L27/108
代理机构 代理人
主权项
地址