发明名称 THE METHOD OF CONCURRENTLY ANALYSIS TOGRTHER ON FACTORY LAYOUT DESIGN AND FACTORY PRODUCTION LINE LOGISTICS SIMULATION
摘要 PURPOSE: Factory layout modeling using a computer and a factory layout logistics analysis method which factory layout modeling and simulation is interlocked are provided to reduce logistics analysis time after the factory layout modeling, thereby increasing the satisfaction of the factory layout modeling. CONSTITUTION: Simulation information is inputted to the confirming information storage of CAD(Computer Aided Design) information. The simulation information is easily hidden or shown by making a layer different. Data is saved as a text type by using a simulation module. A simulation engine utilizes the data. A layout design and simulation are parallely performed, and simulation input information is interlocked according to a design change.
申请公布号 KR20100084408(A) 申请公布日期 2010.07.26
申请号 KR20090003883 申请日期 2009.01.16
申请人 LEE, JIN YONG 发明人 LEE, JIN YONG
分类号 G06F17/50;G06F17/40 主分类号 G06F17/50
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