| 摘要 |
<p>On the same semiconductor substrate 1, a memory cell array in which a plurality of memory elements R having a chalcogenide-material storage layer 22 storing a high-resistance state with a high electric resistance value and a low-resistance state with a low electric resistance value by a change of an atom arrangement are disposed in a matrix is formed in a memory cell region mmry, and a semiconductor integrated circuit is formed in a logic circuit region lgc. This chalcogenide-material storage layer 22 is made of a chalcogenide material containing at least either one of Ga or In of 10.5 atom% or larger to 40 atom% or smaller, Ge of 5 atom% or larger to 35 atom% or smaller, Sb of 5 atom% or larger to 25 atom% or smaller, and Te of 40 atom% or larger to 65 atom% or smaller.</p> |
