| 摘要 |
A charge corresponding to an analog signal Vi is accumulated in first and second capacitors 25, 27, respectively. A digital signal VDIGN having a digital value (D1, D0, for example) corresponding to the analog signal Vi is generated. By connecting the second capacitor 27 between an output 21c and an inversion input 21a of an operational amplifier circuit 21 and supplying a first capacitor end 25a with an analog signal VD/A corresponding to the digital signal VDIGN, a first conversion value VOUT1 is generated in the output 21c of the operational amplifier circuit 21. By connecting the first and third capacitors 25, 33 between the output 21c and inversion input 21a of the operational amplifier circuit 21 and supplying a second capacitor end 27a with the analog signal VD/A, a second conversion value VOUT2 is generated in the output 21c of the operational amplifier circuit 21.
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