发明名称 |
COMPARATOR AND A/D CONVERTER |
摘要 |
<p>A current lowering factor detection unit (2a) detects lowering of a power source voltage (VDD) of a dynamic comparator (1). Upon detection of lowering of the power source voltage (VDD) by the current lowering factor detection unit (2a), a substrate bias control unit (3a) controls a substrate bias voltage (VBIAS3) of MOS transistors (m0a, m0b) constituting a comparison unit (10) and/or substrate bias voltages (VBIAS1, VBIAS2) of MOS transistors (m2a, m2b, m3a, m3b) constituting a positive feedback unit (20) in the direction that the threshold value voltage of the MOS transistor becomes smaller.</p> |
申请公布号 |
WO2010082239(A1) |
申请公布日期 |
2010.07.22 |
申请号 |
WO2009JP03476 |
申请日期 |
2009.07.23 |
申请人 |
PANASONIC CORPORATION;SATSUKA, TOMOHIKO;NAKA, JUNICHI;SUSHIHARA, KOUJI |
发明人 |
SATSUKA, TOMOHIKO;NAKA, JUNICHI;SUSHIHARA, KOUJI |
分类号 |
H03K5/08;H03M1/12 |
主分类号 |
H03K5/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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