发明名称 DUAL HIGH-K OXIDES WITH SIGE CHANNEL
摘要 A method and apparatus are described for integrating dual gate oxide (DGO) transistor devices (50, 52) and core transistor devices (51, 53) on a single substrate (15) having a silicon germanium channel layer (21) in the PMOS device areas (112, 113), where each DGO transistor device (50, 52) includes a metal gate (25), an upper gate oxide region (60, 84) formed from a second, relatively higher high-k metal oxide layer (24), and a lower gate oxide region (58, 84) formed from a first relatively lower high-k layer (22), and where each core transistor device (51, 53) includes a metal gate (25) and a core gate dielectric layer (72, 98) formed from only the second, relatively higher high-k metal oxide layer (24).
申请公布号 US2010184260(A1) 申请公布日期 2010.07.22
申请号 US20090357057 申请日期 2009.01.21
申请人 LUO TIEN-YING;KARVE GAURI V;TEKLEAB DANIEL G 发明人 LUO TIEN-YING;KARVE GAURI V.;TEKLEAB DANIEL G.
分类号 H01L21/82;H01L21/04;H01L21/336;H01L21/77 主分类号 H01L21/82
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