Memory cell structures and biasing schemes are provided. Certain embodiments pertain to a modified floating-body gate cell, which can provide improved retention times. In one embodiment, a gated diode is used to drive the gate of a second transistor structure of a cell. In another embodiment, a body-tied-source (BTS) field effect transistor is used to drive the gate of the second transistor structure of a cell.
申请公布号
WO2010083014(A2)
申请公布日期
2010.07.22
申请号
WO2009US69642
申请日期
2009.12.29
申请人
UNIVERSITY OF FLORIDA RESEARCH FOUNDATION INC.;FOSSUM, JERRY, G.;LU, ZHICHAO