| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device which can prevent an increase of a threshold voltage of a memory cell arranged next to a selection gate transistor, and in which a thickness of a side wall insulating film between selection gate transistors can be reduced. <P>SOLUTION: A thickness of a third side wall insulating film of a peripheral transistor is larger than that of a first side wall insulating film of the selection gate transistor and a second side wall insulating film of the adjacent selection gate transistor. An interval between a gate electrode MG of a memory cell and a selection gate electrode SG1 of the selection gate transistor is larger than an interval between the gate electrodes MG, and an interval between the selection gate electrode SG1 and a selection gate electrode SG2 of the selection gate transistor is larger than the interval between the gate electrode MG and the selection gate electrode SG1. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
