发明名称 |
APPARATUS AND METHOD FOR PERFORMING MAGNITUDE DETECTION FOR ARITHMETIC OPERATIONS |
摘要 |
<p>An apparatus and method is provided comprising processing circuitry, one or more registers and control circuitry. The control circuitry is configured such that it is responsive to a combined magnitude-detecting arithmetic instruction to control the processing circuitry to perform an arithmetic operation on at least one data element and further to perform a magnitude-detecting operation. The magnitude-detecting operation calculates a magnitude-indicating result providing an indication of a position of a most-significant bit of a magnitude of a result of the arithmetic operation irrespective of whether the most-significant bit position exceeds the data element width of the at least one data element.</p> |
申请公布号 |
EP2208132(A1) |
申请公布日期 |
2010.07.21 |
申请号 |
EP20080788515 |
申请日期 |
2008.09.02 |
申请人 |
ARM LIMITED |
发明人 |
KERSHAW, DANIEL;WILDER, MLADEN;SYMES, DOMINIC, HUGO |
分类号 |
G06F9/302 |
主分类号 |
G06F9/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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