| 摘要 |
Some embodiments of the invention provide a system and method where a physical design (“PD”) process can use simplified manufacturing rules to generate an integrated circuit (“IC”) layout. A layout optimization process transforms the PD generated layout to become more manufacturing rule compliant layout using a full set of manufacturing rules. The invention increases the probability of the PD process successfully generates an IC layout since the PD is not burdened with having to consider the full complexity of the manufacturing rules.
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