发明名称 |
Integrated circuit system employing stress memorization transfer |
摘要 |
An integrated circuit system that includes: providing a gate and a spacer formed over a substrate; performing an implant that amorphizes the gate and a source/drain region defined by the spacer; removing the spacer; depositing a stress memorization layer over the integrated circuit system; and transferring a stress from the stress memorization layer to the gate and the source/drain region.
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申请公布号 |
US7759207(B2) |
申请公布日期 |
2010.07.20 |
申请号 |
US20070689030 |
申请日期 |
2007.03.21 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD. |
发明人 |
QUEK ELGIN KIOK BOONE;YELEHANKA PRADEEP RAMACHANDRAMURTHY |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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