发明名称 ARITHMETIC UNIT, PROCESSOR, COMPILER AND COMPILING METHOD
摘要 <p>PURPOSE: An operator, a processor, a compiler, and a compiling method are provided to convert a sign of floating point type data at high speed on the basis of condition data including a sign addition condition. CONSTITUTION: A data provider(140) supplies floating point type target data which a sign is added and condition data including a sign addition condition. A sign data generator(160) extracts a condition included in the condition data and generates sign data for adding a sign to the target data on the basis of the condition. An integral operating unit(150) regards the target data as integral type data in order to add the sign to the sign data on the basis of the sign data and the target data and performs integer operation.</p>
申请公布号 KR20100082729(A) 申请公布日期 2010.07.19
申请号 KR20100001643 申请日期 2010.01.08
申请人 SONY CORPORATION 发明人 MOGI YUKIHIKO;KAMATA MASATO;KAWAGUCHI YUKI
分类号 G06F9/06;G06F9/302;G06F9/45 主分类号 G06F9/06
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