| 摘要 |
A clocked D-type Flip-Flop circuit has a transmission gate to admit an input data and to provide an intermediate output to a clock-controlled inverter based on the clock signals. The clock-controlled inverter is used as a latch for latching the output signal from the transmission gate and releases the latched signal by the same clock signals to an output inverter. The output of the output inverter is the Q terminal of the Flip-Flop circuit. Another output inverter is used to invert the signal from the Q terminal into a complementary output signal. In one of the embodiments of the present invention, another transmission gate is used to condition the complementary output signal.
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