| 摘要 |
PROBLEM TO BE SOLVED: To provide a switching regulator capable of realizing a stable synchronous rectifying function without degrading power efficiency at the time of very low load. SOLUTION: Reference time signal generating circuits 451 and 452 generate a first reference time signal Tsrs_1, which is a reference for a boundary between a low load state and a very low load state, and a second reference time signal Tsrs_2 which is a reference for determining whether it is a very low load state that does not turn on MOSFETQs. Maximum on width control circuits 441 and 442 generate maximum on width signals Tmot_1 and Tmot_2. When the delay time (Tdif) of conduction timing of a built-in diode Ds becomes longer than the time width of Tsrs_1, a load LD is determined to be in very low load state. When Tdif is shorter than the time width of Tsrs_2, a synchronous drive signal Vgs is outputted to Qs. By regulating the maximum on width using Tmot_2, the counter flow of a secondary side current is prevented without stopping synchronous rectification at the Qs. COPYRIGHT: (C)2010,JPO&INPIT |
