| 摘要 |
An apparatus for scaling a load device with frequency in a phase interpolator can include an analog loop and a digital loop. The load device of the phase interpolator can include a transistor and a plurality of resistors selectively configured in parallel with the transistor. The analog loop controls a resistance of the transistor based on a voltage applied to a control terminal of the transistor. For instance, the analog loop can tune the resistance of a PMOS device by adjusting a voltage applied to the PMOS device's gate terminal. In addition, the analog loop can include a comparator to compare a voltage across the transistor to a reference voltage such that an optimal voltage is maintained for an output swing of the phase interpolator. The analog loop can also include a low pass filter coupled to an output of the comparator to define frequency stability and loop bandwidth of the analog loop. The digital loop operates in conjunction with the analog loop and controls the plurality of resistors by incrementing or decrementing a number of resistors that are configured in parallel with the transistor in the load device. In combining the analog and digital loops to control the load device of the phase interpolator, this configuration takes advantage of the wide tuning range of the digital control and the smooth, continuous output of the analog control. Further, in operating the analog and digital loops in conjunction with each other, the present invention avoids a long observation time in locking the system, as seen in conventional designs, while guaranteeing frequency stability in the operation of both the analog and digital loops.
|
