发明名称 Memory with an output register for test data and process for testing a memory and memory module
摘要 The invention relates to a memory with a memory array with memory cells, with an input/output circuit which is connected to the memory cells and which interchanges data with the memory cells, with an output register which is connected to the input/output circuit, with the output register being used to output data via a data output, having an input register which is connected to a data input and to the input/output circuit, with the data input and the input register being used to input data into the memory cells, with test data being written to the output register in a test mode. The invention furthermore relates to a process for testing a memory and to a memory module.
申请公布号 US7757132(B2) 申请公布日期 2010.07.13
申请号 US20070752907 申请日期 2007.05.23
申请人 QIMONDA AG 发明人 SPIRKL WOLFGANG;BROX MARTIN
分类号 G11C29/00 主分类号 G11C29/00
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