发明名称 Semiconductor memory, method of controlling the semiconductor memory, and memory system
摘要 A semiconductor memory comprising an address transition detection circuit for detecting a transition of an address and outputs an address detection signal; an address input circuit for inputting an input address based upon the address detection signal; a command judgment circuit for decoding a command signal input and outputting a command judgment signal; a redundancy circuit for making a redundancy judgment based upon a redundancy judgment signal indicating timing of a redundancy judgment, wherein the redundancy circuit includes a redundancy judgment speed-up circuit for controlling an output of the redundancy judgment signal based upon a predetermined command signal.
申请公布号 US7755957(B2) 申请公布日期 2010.07.13
申请号 US20080208818 申请日期 2008.09.11
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 NAKAMURA TOSHIKAZU;KAWAKUBO TOMOHIRO
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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