FORMATION OF HIGH-K GATE STACKS IN SEMICONDUCTOR DEVICES

摘要

A method of forming a high-K gate stack for a MOSFET device to control the threshold voltage for the MOSFET device. A first high-K metallic oxide layer is formed on a semiconductor substrate. At least one composite layer is then formed directly on the first layer. The composite layer is composed of a second high-K metallic oxide layer formed directly on a dipole induction layer. The dipole induction layer includes a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers. A metallic gate electrode is then formed on the composite layer. Formation of the various layers is such as to position the dipole induction layer of the composite layer between the gate electrode and substrate so as to shift the threshold voltage to a desired level. A high-K gate stack in a MOSFET device formed by the above method is also provided.