| 摘要 |
PURPOSE: A data output apparatus for a semiconductor memory is provided to secure an effective data window under high frequency operation conditions by rapidly controlling DC slew rate in different frequency excluding a specific operation frequency. CONSTITUTION: A pre-driver element connected to a signal input terminal comprises a first and second inverter(5,7). A final driver comprises a first and second PMOS transistor(25,27) which is connected to the inverter. A gate terminal of the PMOS transistor is connected to the output terminal of the inverter. A source terminal of the PMOS transistor receives an external power(VDD). The drain end of the PMOS transistor is connected to the output terminal. A first resistor(51) is connected between the first inverter and first PMOS transistor. A first NMOS transistor(47) is connected to both ends of the resistor. A second resistor(52) is connected between the second inverter and second PMOS transistor. The second NMOS transistor(48) is connected to both ends of the second resistor.
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