发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To transfer a circuit pattern having a size finer than a half of a wavelength of an exposure beam on a semiconductor wafer plane with excellent accuracy by means of a mask whereupon an integrated circuit pattern is formed and a reduction projection aligner. <P>SOLUTION: The accuracy of transferring a circuit pattern on the semiconductor wafer is improved by synergic effects of super-resolution exposure in which the aberration of reduction projection exposure is suppressed by providing a mask cover made of a transparent medium on a pattern face of the integrated circuit mask, and an increasing method of the substantial numeric aperture of the optical reduction projection lens system provided with the wafer cover made of the transparent medium on a photoresist side of the semiconductor wafer to which a planarizing process is performed. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010153922(A) 申请公布日期 2010.07.08
申请号 JP20100080762 申请日期 2010.03.31
申请人 OKAMOTO YOSHIHIKO 发明人 OKAMOTO YOSHIHIKO;OGITA MASAMI
分类号 H01L21/027;G03F1/14;G03F7/20 主分类号 H01L21/027
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