METHOD, APPARATUS AND SYSTEM FOR TESTING INTEGRATED CIRCUITS

摘要

A method, apparatus and system for testing integrated circuits are disclosed. A plurality of devices under test and a plurality of operation result comparison devices are in a common substrate. Identical input stimulations are applied to each of the plurality of devices under test and operation results are generated. The operation results are compared by using the corresponding comparison devices and compared features are obtained. Failure devices under test are sorted out according to the compared features.