发明名称 ALIGNMENT APPARATUS FOR SEMICONDUCTOR WAFER
摘要 A wafer has an annular ridge formed along an outer periphery thereof to serve as a reinforcing portion, and a circuit pattern surrounded with the reinforcing portion. The wafer is placed on a wafer placement plane of a holding stage in a state that the circuit pattern is directed downward. The wafer placement plane is larger in size than the wafer. On the holding stage, a center of the wafer is aligned with a center of the holding stage in such a manner that a plurality of guide pins are engaged with relevant cutout portions formed on the reinforcing portion. Then, the holding stage rotates while suction-holding the reinforcing portion of the wafer, and simultaneously a photosensor detects a portion for alignment formed on the outer periphery of the wafer.
申请公布号 US2010171823(A1) 申请公布日期 2010.07.08
申请号 US20090649120 申请日期 2009.12.29
申请人 YAMAMOTO MASAYUKI;IKEDA SATOSHI 发明人 YAMAMOTO MASAYUKI;IKEDA SATOSHI
分类号 H04N7/18;G01B11/26 主分类号 H04N7/18
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