发明名称 STACKED DIE PARALLEL PLATE CAPACITOR
摘要 A stacked integrated circuit having a first die with a first surface and a second die with a second surface facing the first surface, the stacked integrated circuit includes a capacitor. The capacitor is formed by a first conducting plate on a region of the first surface, a second conducting plate on a region of the second surface substantially aligned with the first conducting plate, and a dielectric between the first conducting electrode and the second conducting electrode.
申请公布号 WO2010077778(A1) 申请公布日期 2010.07.08
申请号 WO2009US67666 申请日期 2009.12.11
申请人 QUALCOMM INCORPORATED;CHANDRASEKARAN, ARVIND 发明人 CHANDRASEKARAN, ARVIND
分类号 H01L23/50;H01L25/065 主分类号 H01L23/50
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