发明名称 |
DEVICE AND METHOD FOR CONTROLLING CLOCK GATING IN DIGITAL SYSTEM |
摘要 |
<p>PURPOSE: A device and a method for controlling a clock gating operation are provided to effectively reduce power source using the clock gating operation in a wide range. CONSTITUTION: A unit part(100) is composed of a plurality of units which processes signal using a clock or clock controlling signal. Bouncing detectors(200, 300) are connected between driving power source and the unit part. The bouncing detectors detect the bounce of a power line under the clock gate state of the unit part. A gating controller(400) analyzes the detected bounce and determines the number of units to be turned-off. The gating controller transmits the clock controlling signal to control the clock gate operation.</p> |
申请公布号 |
KR20100078649(A) |
申请公布日期 |
2010.07.08 |
申请号 |
KR20080136967 |
申请日期 |
2008.12.30 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
HWANG, SEON HO;CHOI, WON SUK |
分类号 |
H03K19/0175;H03K19/0948 |
主分类号 |
H03K19/0175 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|