摘要 |
A system (200, 300) comprises signal processing logic (210, 310) that is operably coupled to at least one memory element (220, 320) and is arranged to enable access to the at least one memory element (220, 320). The signal processing logic (210, 310) is arranged to receive a security key (235, 335), generate a system key (255, 355) using the received security key (235, 335) and a system specific seed (260, 360), perform a comparison of the generated system key to a reference key (227, 327) stored in an area of memory (225, 325) of the at least one memory element. The signal processing logic (210, 310) is also arranged to configure a level of access to the at least one memory element (220, 320) based at least partly on the comparison of the generated system key (255, 355) to the reference key (227, 327) stored in memory (225, 325). |
申请人 |
FREESCALE SEMICONDUCTOR, INC.;ROBERTSON, ALISTAIR;BEATTIE, DEREK;SCOBIE, JAMES ANDREW COLLIER |
发明人 |
ROBERTSON, ALISTAIR;BEATTIE, DEREK;SCOBIE, JAMES ANDREW COLLIER |