发明名称 |
ENABLING AN INTEGRATED MEMORY CONTROLLER TO TRANSPARENTLY WORK WITH DEFECTIVE MEMORY DEVICES |
摘要 |
PURPOSE: An enabling an integrated memory controller is provided to improve the whole performance by applying a lower refresh rate than a predetermined refresh rate which is defined by a memory module. CONSTITUTION: A system(100) comprises an integrated circuit(102), a DRAM sub system(104), and a memory(106). The integrated circuit comprises a logic controlling the transmission of information to the DRAM sub system. The integrated circuit comprises a processor cores and a logic unit(110). The process core is comprised of one of general process cores and an integrated process cores with graphic processor cores.
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申请公布号 |
KR20100080383(A) |
申请公布日期 |
2010.07.08 |
申请号 |
KR20090129726 |
申请日期 |
2009.12.23 |
申请人 |
INTEL CORP. |
发明人 |
DATTA SHAMANNA M.;ALEXANDER JAMES W.;NATU MAHESH S.;KHANNA RAHUL;KUMAR MOHAN J. |
分类号 |
G11C11/4078;G11C11/4063;G11C11/4074 |
主分类号 |
G11C11/4078 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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