发明名称 PLL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a PLL circuit for easily dealing with fluctuation of a loop bandwidth when it occurs in the PLL circuit where a phase comparison circuit, a charge pump, a loop filter, and a voltage controlled oscillation circuit are connected in this order. <P>SOLUTION: The phase comparison circuit includes two inputs to which a feedback signal output from a voltage controlled oscillation circuit and a reference signal input from outside are connected. The charge pump includes a current source corresponding to a variety of gains. The PLL circuit includes; a PLL lock detection circuit for outputting a lock signal when a PLL is locked based on the reference signal and an output of the phase comparison circuit; a count circuit for counting reference signals; a latch circuit for latching the counter signal when locked based on the lock signal and the counter signal of the counter circuit; and a selection means which is set to a code of a current source corresponding to a fixed gain before the reference signal is input, selects a code of the current source corresponding to an appropriate gain from the lock signal and latched counter signal after the reference signal is input, and outputting the code. <P>COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010154211(A) 申请公布日期 2010.07.08
申请号 JP20080330025 申请日期 2008.12.25
申请人 TOPPAN PRINTING CO LTD 发明人 TSUSHIMA HIROYUKI
分类号 H03L7/093;H03L7/095 主分类号 H03L7/093
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