发明名称 CIRCUIT FOR ESTIMATING RELIABILITY OF BRANCH PREDICTION AND METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To estimate the reliability of branch prediction with high accuracy. SOLUTION: The branch prediction reliability estimation circuit in a processor includes: an instruction processing pipeline 30 for performing pipeline processing of an input program; a branch predictor 40 for predicting a branch direction of a conditional branch instruction included in the program; and a pipeline gating circuit 20 for determining whether to permit speculation processing execution of an instruction in accordance with a prediction reliability to the conditional branch instruction. The branch prediction reliability estimation circuit is provided with: a reliability determining means for determining the reliability of the prediction from the prediction reliability to the conditional branch instruction; a reliability updating means for updating the reliability of the prediction to the conditional branch instruction; and an allowable threshold storage circuit 12 for storing an allowable threshold to be used to determine the reliability. The reliability determining means compares the allowable threshold input from the allowable threshold storage circuit 12 with the reliability to determine the reliability. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010152843(A) 申请公布日期 2010.07.08
申请号 JP20080333049 申请日期 2008.12.26
申请人 NEC CORP 发明人 NINOMIYA YASUYUKI
分类号 G06F9/38 主分类号 G06F9/38
代理机构 代理人
主权项
地址