发明名称 Automatic voltage drop optimization
摘要 To minimize the voltage drops in an electronic circuit, existing instances are moved and decoupling capacitors are automatically inserted according to an algorithm. A model of the voltage drop on a row of gate elements is presented. The model allows for rapid computations of the effect of a particular move or insertion on voltage drop in the circuit.
申请公布号 US7752578(B2) 申请公布日期 2010.07.06
申请号 US20060551149 申请日期 2006.10.19
申请人 APACHE DESIGN SOLUTIONS, INC. 发明人 ALLEN DAVID L.;KAPRAL CHRISTOPHER W.
分类号 G06F17/50 主分类号 G06F17/50
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