| 摘要 |
PURPOSE: A method for manufacturing contact plugs for a semiconductor device is provided to improve the uniformity of a planarization process by reducing the step differences between gate lines. CONSTITUTION: An interlayer insulating layer is formed on the upper side of a semiconductor substrate(100) including gate lines(G). A contact hole is formed by etching the interlayer insulating layer. A plug conductive layer fills the contact hole. A planarization regulating layer(125) is formed on the surface of the plug conductive layer and the interlayer insulating layer. Landing plugs are formed by performing a planarization process.
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