| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device that can enhance the planar positioning accuracy of a crystal defect formation region, and to provide a method of manufacturing the same. Ž<P>SOLUTION: The semiconductor device includes: a MOSFET having an n-type drift layer 12, a p-type base layer 15, an n+-type source layer 16, and a gate electrode 25; a lifetime control region 6, that has a tail region T1 of a crystal defect density distribution that gradually increases from the surface of the n-type drift layer 12 and is the center of recombination, a defect peak region 31 continuous from the tail region T1 in a current path flowing through the p-type base layer 15, in the n-type drift layer 12 and the p-n junction of the n-type drift layer 12, in the forward direction or in the vicinity of the same, and a tail region T2 continuous from the defect peak region 31 toward the back face and gradually decreasing, and that is formed two-dimensionally and selectively; and a lifetime non-control region 7 that is adjacent to the lifetime control region 6 with the crystal defect density of the surface that does not exceed the crystal defect density of the surface of the lifetime control region 6 and has a tail region T3 that gradually increases to the back surface from the surface. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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