发明名称 INFORMATION PROCESSOR AND MEMORY CONTROL METHOD THEREFOR
摘要 <p>Provided are a highly reliable information processor capable of switching from a current-use system to a standby system safely when a CPU of the current-use system malfunctions, and a memory control method therefor.  The current-use system allows writing to a first common memory accessible from the current-use system and the standby system only when writing notification data which is to be notified from the current-use system to the standby system, to the first common memory.  The current-use system writes the notification data to the first common memory, and then, notifies the standby system of the fact that the notification data has been written in the first common memory.  The standby system is notified from the current-use system that the notification data has been written in the first common memory, and then, reads out the notification data from the first common memory, stores the notification data in a memory of the standby system accessible only from the standby system, and notifies the current-use system of the fact that the notification data has been read out from the first common memory.  After the current-use system is switched to the standby system, the standby system executes processing using the notification data stored in the memory of the standby system.</p>
申请公布号 WO2010073510(A1) 申请公布日期 2010.07.01
申请号 WO2009JP06688 申请日期 2009.12.08
申请人 HATAKEYAMA, SATOSHI;NEC CORPORATION 发明人 HATAKEYAMA, SATOSHI
分类号 G06F11/20;G06F15/167 主分类号 G06F11/20
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