| 摘要 |
PROBLEM TO BE SOLVED: To provide a cache memory for dynamically changing pre-fetch width according to an operating situation. SOLUTION: A cache memory 3 includes: a data array 14 for storing a copy of data stored by a main storage device 3 by line units; a memory controller 10 for writing the copy of the data read from the main storage device 3 in each line of the data array 14; a control information memory 13 for storing use information showing the using situations of the lines; a cache controller 11 for determining whether or not the data requested from a processor are stored in the data array 14, and for, when the data are not stored, instructing the memory controller 10 to read the data; and a pre-fetch control part 12 for determining the number of pre-fetch lines to be pre-fetched by the memory controller 10 on the basis of user information. The memory controller 10 performs pre-fetch according to the number of pre-fetch lines when reading the data from the main storage device 3. COPYRIGHT: (C)2010,JPO&INPIT
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