发明名称 BITSTREAM PROCESSOR OPERATING VARIABLE LENGTH CODE CODEC
摘要 PURPOSE: A bit stream processor processing a variable length code codec is provided to support a multi-standard codec by using a syntax processor which controls a table storing a plurality of zigzag scan orders. CONSTITUTION: A syntax processor(170) outputs a run value and a level value by syntax-processing a bit stream. A zigzag table(190) stores a plurality of zigzag scan orders. A run-level processor(150) performs the run-level decoding by receiving the run value and the level value. The run-level processor stores the execution result according to the zigzag order corresponding to the codec of the bit stream among the zigzag scan orders. The syntax processor stores a new zigzag scan order in the zigzag table. The run-level processor is comprised of a hardwired logic. The syntax processor comprises a general microprocessor.
申请公布号 KR20100073242(A) 申请公布日期 2010.07.01
申请号 KR20080131861 申请日期 2008.12.23
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE;KWANGWOON UNIVERSITY INDUSTRY-ACADEMIC COLLABORATION FOUNDATION 发明人 LEE, SEONG WON;HEO, SE WAN;SUK, JUNG HEE;ROH, TAE MOON;KIM, JONG DAE
分类号 H03M7/40;G06F12/04;H03M7/42 主分类号 H03M7/40
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