| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a dynamic type semiconductor memory device having a DLL (Delay Locked Loop) attaining stable clock generating operation, high accuracy and low power consumption. Ž<P>SOLUTION: The dynamic type semiconductor memory device includes a DLL circuit generating an inner clock signal, peripheral circuits whose operation is controlled by the inner clock signal and a memory cell arrays. The semiconductor memory device further includes a first power source pad connected to a synchronization circuit so as to supply a first power source voltage, a second power source pad connected to the synchronization circuit so as to supply a second power source voltage lower than the first power source voltage, a third power source pad for supplying a third power source voltage to the peripheral circuit and the memory cell array and a fourth power source pad supplying a fourth power source voltage lower than the third power source voltage to the peripheral circuit and a memory bank. The plurality of memory cell arrays are divided and disposed in first and second regions. The plurality of peripheral circuits are disposed in a third region between the first and second regions. The first, second, third and fourth power source pads are disposed in a fourth region between the first and third regions. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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