发明名称 |
Memory cell array comprising nanogap memory elements |
摘要 |
<p>Disclosed is a memory cell array (10) including: word lines (WL) and first and second bit lines (BL1,BL2) respectively connected to memory cells (100), wherein each memory cell (100) includes a MOS transistor (110) and a nanogap element (120) formed inside a contact hole, the switching element includes first and second conductive layers and a gap in which a resistance value is changed by applying a predetermined voltage, each word line is connected to a gate electrode, each first bit line is connected to a second electrode, each second bit line is connected to the second conductive layer, and data is written by supplying a write voltage to the first bit line connected to a selected memory cell and specifying the word line connected to the memory cell, and data is read by supplying a read voltage to the first bit lines connected to the memory cell and specifying the word line connected to the memory cells.</p> |
申请公布号 |
EP2202799(A2) |
申请公布日期 |
2010.06.30 |
申请号 |
EP20090179363 |
申请日期 |
2009.12.16 |
申请人 |
FUNAI ELECTRIC CO., LTD.;FUNAI ELECTRIC ADVANCED APPLIED TECHNOLOGY RESEARCH INSTITUTE INC. |
发明人 |
TAKAHASHI, TSUYOSHI;FURUTA, SHIGEO;MASUDA, YUICHIRO;ONO, MASATOSHI |
分类号 |
H01L27/24;G11C13/00;G11C13/02 |
主分类号 |
H01L27/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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