发明名称 PVD-based metallization methods for fabrication of interconnections in semiconductor devices
摘要 Recessed features on a Damascene substrate are filled with metal using plasma PVD. Recessed features having widths of less than about 300 nm, e.g., between about 30-300 nm can be filled with metals (e.g., copper and aluminum), without forming voids. In one approach, the deposition is performed by exposing the substrate to a high-density plasma characterized by high fractional ionization of metal. Under these conditions, the metal is deposited within the recess, without forming large overhang at the opening of the recess. In some embodiments, the metal is deposited within the recess, while diffusion barrier material is simultaneously etched from the field region. In a second approach, recessed features are filled by performing a plurality of profiling cycles, wherein each cycle includes a net etching and a net depositing operation. Etching and depositing parameters are adjusted such that the recessed features are filled without forming overhangs and voids.
申请公布号 US7745332(B1) 申请公布日期 2010.06.29
申请号 US20080074168 申请日期 2008.02.29
申请人 NOVELLUS SYSTEMS, INC. 发明人 SHAVIV ROEY;DULKIN ALEXANDER;MACKIE NEIL;JULIANO DANIEL;ROZBICKI ROBERT
分类号 H01L21/44 主分类号 H01L21/44
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