发明名称 Delta-sigma analog-to-digital converter circuit having reduced sampled reference noise
摘要 A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.
申请公布号 US7746257(B2) 申请公布日期 2010.06.29
申请号 US20090366214 申请日期 2009.02.05
申请人 CIRRUS LOGIC, INC. 发明人 SCHNEIDER EDMUND M.;SWANSON ERIC J.;MELANSON JOHN L.
分类号 H03M3/00 主分类号 H03M3/00
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