| 摘要 |
The present invention provides a method and apparatus for network address translation (NAT) based on pure hardware architecture. The method includes that when receiving a packet, the first MAC circuit will translate the address of the packet directly and store the address-translated packet into the storage, and that the first MAC circuit informs the second MAC circuit to access the address-translated packets from the storage so as to output. Because address translation requires lots of operating resource, the present invention using the first and the second MAC circuits instead of the CPU to obtain the aforesaid functions only needs a simple, low-speed and low-power CPU to setup the parameters of the first and the second MAC circuits or process few special packets, thus getting the biggest bandwidth under the restriction, the zero wastage of the smallest packet, followed the stipulation of IEEE802.3 in the environment of 100 MHz Ethernet.
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