| 摘要 |
PURPOSE: A memory cell with a thyristor and a memory device including the same are provided to reduce the size of the memory cell by vertically implementing the memory cell. CONSTITUTION: A vertical transistor includes a first source/drain region(111), a channel region(112), and a second source/drain region(113). A thyristor includes a first doped region(121), a second doped region(122), a third doped region(123), and a fourth doped region(124). The first source/drain region is connected to the first doped region. A first word line(WL1) surrounds the channel region of the transistor. A second word line(WL2) surrounds the second doped region of the thyristor.
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