发明名称 |
INTEGRIERTE ANITFUSE-STRUKTUR FÜR FINFET- UND CMOS-VORRICHTUNGEN |
摘要 |
A method is described for fabricating and antifuse structure (100) integrated with a semiconductor device such as a FINFET or planar CMOS devise. A region of semiconducting material (11) is provided overlying an insulator (3) disposed on a substrate (10); an etching process exposes a plurality of corners (111-114) in the semiconducting material. The exposed corners are oxidized to form elongated tips (111t-114t) at the corners; the oxide (31) overlying the tips is removed. An oxide layer (51), such as a gate oxide, is then formed on the semiconducting material and overlying the corners; this layer has a reduced thickness at the corners. A layer of conducting material (60) is formed in contact with the oxide layer (51) at the corners, thereby forming a plurality of possible breakdown paths between the semiconducting material and the layer of conducting material through the oxide layer. Applying a voltage, such as a burn-in voltage, to the structure converts at least one of the breakdown paths to a conducting path (103, 280). |
申请公布号 |
DE60236375(D1) |
申请公布日期 |
2010.06.24 |
申请号 |
DE2002636375 |
申请日期 |
2002.12.20 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORP. |
发明人 |
RANKIN, JED H.;ABADEER, WAGDI W.;BROWN, JEFFREY S.;CHATTY, KIRAN V.;TONTI, WILLIAM R.;GAUTHIER, ROBERT J.;FRIED, DAVID M. |
分类号 |
H01L21/82;H01L21/84;H01L23/525;H01L27/06;H01L27/118;H01L27/12 |
主分类号 |
H01L21/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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